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How to enable vector computing on the RISC-V? #99

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opened 2025-08-29 19:08:09 -04:00 by lesept777 · 1 comment
lesept777 commented 2025-08-29 19:08:09 -04:00 (Migrated from github.com)
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Are there any options to add during the build phase to enable the use of the vector computing of the RISC-V core?

Are there any options to add during the build phase to enable the use of the vector computing of the RISC-V core?
ret7020 commented 2026-01-09 09:38:39 -05:00 (Migrated from github.com)
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For custom code/libs that you build you can set vector flags for compiler in build time (https://github.com/scpcom/LicheeSG-Nano-Build/issues/24#issuecomment-3702983834). Also you can change buildroot config flags like BR2_TARGET_LDFLAGS

For custom code/libs that you build you can set vector flags for compiler in build time (https://github.com/scpcom/LicheeSG-Nano-Build/issues/24#issuecomment-3702983834). Also you can change buildroot config flags like `BR2_TARGET_LDFLAGS`
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